Memory
Coherence Activity Prediction in Commercial Workloads
Tuesday January 25, 2005
Hamerschlag Hall D-210
4:00 pm
Stephen
Somogyi
Carnegie Mellon University
Recent research indicates that prediction-based coherence optimizations
offer substantial performance improvements for scientific applications
in distributed shared memory multiprocessors. Important commercial
applications also show sensitivity to coherence latency, which will
become more acute in the future as technology scales. Together,
these observations suggest the importance of investigating coherence
activity prediction in the context of commercial workloads.
In this talk, I will present a trace-based Downgrade Predictor
for predicting last stores to shared cache blocks prior to consumption
by other processors, and a pattern-based Consumer Set Predictor
for predicting subsequent readers. I will present an evaluation
of these predictors on commercial workloads, show that downgrade
prediction identifies 51%-94% of last stores, while consumer set
prediction is ineffective for these workloads. Finally, I develop
a hierarchical Downgrade Predictor that improves prediction coverage.
Stephen Somogyi is a third year graduate student in the Computer
Architecture Lab at Carnegie Mellon, working with Prof. Babak Falsafi.
Stephen's research revolves around the memory system of multiprocessor
commercial servers. Stephen recently received his Master's degree
in ECE and is continuing in the PhD program.
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