ASPLOS 2016

Sunday, Apr 3, 2016 PM 6:00-8:00 Reception Monday, Apr 4, 2016 AM 8:15-8:30 Welcoming Remarks 8:30-9:30 Keynote I: Programming Uncertain <T>hings, Kathryn McKinley, Microsoft Research Chair: Yuanyuan(YY) Zhou, University of California San Diego 9:30-10:20 Lightning Session -19 papers Chair: Ding Yuan, University of Toronto 10:20-10:40 Break 10:40-11:55 Session 1A: Multicore Chair: David Wentzlaff, Princeton University Session 1B: I/O Chair: Shan Lu, University of Chicago PM 12:00-1:10 Lunch 1:10-2:25 Session 2A: Memory Management Chair: Ricardo Bianchini, Microsoft Research Session 2B: Reliability and Debugging I Chair: Gilles Muller, INRIA 2:25-2:45 Break 2:45-4:25 Session 3A: Heterogeneous Architectures and Accelerators I Chair: Calin Cascaval, Qualcomm Session 3B: Security I Chair: Gernot Heiser, NICTA and UNSW Australia 4:30-6:00 ASPLOS Poster Session Chair: Ding Yuan, Univeristy of Toronto 6:00-7:30 Wild and Crazy Ideas (WACI) Invited Speakers Session Chair: Dan Tsafrir, Technion - Israel Institute of Technology 7:30-8:30 Business Meeting Tuesday, Apr 5, 2016 AM 8:15-9:15 Keynote II: Brain Inspired Computing, Stanley Williams, HP Chair: Tom Conte, Georgia Institute of Technology 9:15-9:25 Award Announcement 9:25-10:25 Lightning Session -20 papers (2min each) Chair: Ding Yuan, University of Toronto 10:25-10:45 Break 10:45-12:00 Session 4A: Code Generation and Synthesis Chair: Xipeng Shen, NC State University Session 4B: Energy and Thermal Management Chair: Rajeev Balasubramonian, University of Utah and HP-Labs PM 12:00-1:00 Lunch 1:00-2:40 Session 5A: Emerging Memory Technologies Chair: Joseph Tucek, HP Labs Session 5B: Cloud Computing Chair: Lingjia Tang, University of Michigan 2:40-3:00 Break 3:00-4:15 Session 6A: Reliability and Debugging II Chair: Sam H. Noh, UNIST (Ulsan National Institute of Science and Technology) Session 6B: OS Optimizations Chair: Emmett Witchel, University of Texas at Austin 4:30-9:00 Excursion Wednesday, Apr 6, 2016 AM 8:15-9:15 Debate: Programmer Productivity in a World of Mushy Interfaces: Challenges of the Post-ISA Reality Chair: Emmett Witchel, University of Texas at Austin 9:15-10:00 Lightning Session -14 papers (2min each) Chair: Ding Yuan, Univeristy of Toronto 10:00-10:20 Break 10:20-12:00 Session 7A: Non-traditional Computer Systems Chair: Dean Tullsen, University of California, San Diego Session 7B: Heterogeneous Architectures and Accelerators II Chair: Josep Torellas, University of Illinois, Urbana-Champaign PM 12:00-1:10 Lunch 1:10-2:25 Session 8A: Security II Chair: Karin Strauss, Microsoft Research and University of Washington Session 8B: Transactional Memory Chair: Gilles Muller, INRIA 2:25-2:45 Break 2:45-3:00 Closing Remarks

Monday, April 4, 2016

Monday, 8:30am-9:30am

Keynote I: Programming Uncertain <T>hings, Kathryn McKinley, Microsoft Research

Chair: Yuanyuan Zhou, University of California San Diego

· Bio: Kathryn S. McKinley is a Principal Research at Microsoft. Her research interests span programming languages, compilers, runtime systems, architecture, performance, and energy with a recent focus on programming models for estimates. She and her collaborators have produced several widely used tools: the DaCapo Java Benchmarks (30,000+ downloads), TRIPS Compiler, Hoard memory manager, MMTk memory management toolkit, and Immix garbage collector. Her awards include the ACM SIGPLAN Programming Languages Software Award; ACM SIGPLAN Distinguished Service Award; and best & test of time paper awards from ASPLOS, OOPSLA, ICS, SIGMETRICS, IEEE Top Picks, SIGPLAN Research Highlights, and CACM Research Highlights. She served as program chair for ASPLOS, PACT, PLDI, ISMM, and CGO. She is currently CRA and CRA-W Board member. Dr. McKinley is honored to be among the IEEE and ACM Fellows, to have testified to the House Science Committee (Feb. 14, 2013), and to have graduated 22 PhD students. She and her husband have three sons.

Monday, 10:40am-11:55pm

Session 1A: Multicore

Chair: David Wentzlaff, Princeton University

· WiSync: An Architecture for Fast Synchronization through On-Chip Wireless Communication, Sergi Abadal (University of Illinois Urbana-Champaign), Albert Cabellos-Aparicio, Eduard Alarcon (Universitat Politecnica de Catalunya), and Josep Torrellas (University of Illinois Urbana-Champaign)

· ReBudget: Trading Off Efficiency vs. Fairness in Market-Based Multicore Resource Allocation via Runtime Budget Reassignment, Xiaodong Wang and José Martínez (Cornell University)

· Dirigent: Enforcing QoS for Latency-Critical Tasks on Shared Multicore Systems, Haishan Zhu and Mattan Erez (The University of Texas at Austin)

Monday, 10:40am-11:55pm

Session 1B: I/O

Chair: Shan Lu, University of Chicago

· Paravirtual Remote I/O, Yossi Kuperman, Eyal Moscovici (Technion - Israel Institute of Technology and IBM), Joel Nider, Razya Ladelsky, Abel Gordon (IBM), and Dan Tsafrir (Technion - Israel Institute of Technology)

· High Performance Packet Processing with FlexNIC, Antoine Kaufmann, Simon Peter, Naveen Kr. Sharma, Thomas Anderson, and Arvind Krishnamurthy (University of Washington)

· Specifying and Checking File System Crash-Consistency Models, James Bornholt, Antoine Kaufmann, Jialin Li, Arvind Krishnamurthy, Emina Torlak, and Xi Wang (University of Washington)

Monday, 1:10pm-2:25pm

Session 2A: Memory Management

Chair: Ricardo Bianchini, Microsoft Researh

· Prudent Memory Reclamation in Procrastination-Based Synchronization, Aravinda Prasad (Indian Institute of Science & IBM Linux Technology Center) and K. Gopinath (Indian Institute of Science)

· Whirlpool: Improving Dynamic Cache Management with Static Data Classification, Anurag Mukkara, Nathan Beckmann, and Daniel Sanchez (MIT CSAIL)

· TPC: Target-Driven Parallelism Combining Prediction and Correction to Reduce Tail Latency in Interactive Services, Myeongjae Jeon, Yuxiong He (Microsoft Research), Hwanju Kim (University of Cambridge), Sameh Elnikety (Microsoft Research), Scott Rixner, and Alan L. Cox (Rice University)

Monday, 1:10pm-2:25pm

Session 2B: Reliability and Debugging I

Chair: Gilles Muller, INRIA

· How to Build Static Checking Systems Using Orders of Magnitude Less Code, Fraser Brown, Andres Noetzli, and Dawson Engler (Stanford University)

· TxRace: Efficient Data Race Detection Using Commodity Hardware Transactional Memory, Tong Zhang, Dongyoon Lee, and Changhee Jung (Virginia Tech)

· COGENT: Verifying High-Assurance File System Implementations, Sidney Amani, Alex Hixon, Zilin Chen, Christine Rizkallah, Peter Chubb (NICTA and UNSW), Liam O'Connor (UNSW), Joel Beeren (NICTA and UNSW), Yutaka Nagashima (NICTA), Japheth Lim, Thomas Sewell, Joseph Tuong, Gabriele Keller, Toby Murray, Gerwin Klein, and Gernot Heiser (NICTA and UNSW)

Monday, 2:45pm-4:25pm

Session 3A: Heterogeneous Architectures and Accelerators I

Chair: Calin Cascaval, Qualcomm

· M3: A Hardware/Operating-System Tame Heterogeneous Manycores, Nils Asmussen, Marcus Völp, Hermann Härtig (TU Dresden, Operating-system Chair), Benedikt Nöthen, and Gerhard Fettweis (TU Dresden, Vodaphone Chair Mobile Communications Systems)

· Sidewinder: An Energy Efficient and Developer Friendly Heterogeneous Architecture for Continuous Mobile Sensing, Daniyal Liaqat, Silviu Jingoi, Eyal de Lara, Ashvin Goel, Wilson To, Kevin Lee, Italo De Moraes Garcia (University of Toronto), and Manuel Saldana (Huawei)

· OpenPiton: An Open Source Manycore Research Framework, Jonathan Balkind, Michael McKeown, Yaosheng Fu, Tri Nguyen, Yanqi Zhou, Alexey Lavrov, Mohammad Shahrad, Adi Fuchs (Princeton University), Samuel Payne (Nvidia), Xiaohua Liang, and David Wentzlaff (Princeton University)

· COATCheck: Verifying Memory Ordering at the Hardware-OS Interface, Daniel Lustig (Princeton), Geet Sethi (Rutgers), Margaret Martonosi (Princeton), and Abhishek Bhattacharjee (Rutgers)

Monday, 2:45pm-4:25pm

Session 3B: Security I

Chair: Gernot Heiser, NICTA and UNSW Australia

· True IOMMU Protection from DMA Attacks: When Copy is Faster than Zero Copy, Alex Markuze, Adam Morrison, and Dan Tsafrir (Technion - Israel Institute of Technology)

· Silent Shredder: Zero-Cost Shredding for Secure Non-Volatile Main Memory Controllers, Amro Awad (North Carolina State Univeristy), Pratyusa Manadhata (HP Labs), Yan Solihin (North Carolina State University), Stuart Haber, and William Horne (HP Labs)

· Sego: Pervasive Trusted Metadata for Efficiently Verified Untrusted System Services, Youngjin Kwon (UT Austin), Alan Dunn (Google), Michael Lee (Facebook), Owen Hofmann (Google), Yuanzhong Xu, and Emmett Witchel (UT Austin)

Monday, 6:00pm-7:30pm

Wild and Crazy Ideas (WACI) Invited Speakers Session

Chair: Dan Tsafrir, Technion - Israel Institute of Technology

Full Program: here

· The ASPLOSian Singularity, Emmett Witchel (University of Texas at Austin)

· The Elephant in the Room Cannot Write Parallel Code, Yoav Etsion (Technion – Israel Institute of Technology)

· Silicon Meets Biotech: Building Better Computers by Incorporating Biological Parts, Luis Ceze (University of Washington)

· Wean the Screen: Systems Challenges for Practical, Non-Visual User Interfaces, Don Porter (Stony Brook University)

· Data Untangling Begins at Home, Vishakha Gupta (Intel)

· We Have People for That, Emery Berger (University of Massachusetts Amherst)

· Making Reconfigurable Fabric Actually Reconfigurable, Chris Rossbach (VMware and University of Texas at Austin)

· emembrances From Future Spaces: Nano-Computing and the Imitation Game in 2050, Radu Sion (Stony Brook University)

· A Captain of Industry Who Is Me Changes The Technology Business Forever, James Mickens (Harvard University)

Tuesday, March 17, 2015

Tuesday, 8:15am-9:15am

Keynote II: Brain Inspired Computing, Stanley Williams, HP

Chair: Tom Conte, Georgia Institute of Technology

· Bio: R. Stanley Williams is a Senior Fellow at Hewlett Packard Enterprise. He has received recognition for business, scientific and academic achievement, including being named one of the top 10 visionaries in the field of electronics by EETimes, the 2014 IEEE Outstanding Engineering Manager Award, the 2009 EETimes Innovator of the Year ACE Award, the 2007 Glenn T. Seaborg Medal for contributions to Chemistry, the 50th Anniversary Laureate Lecturer on Electrical and Optical Materials for the TMS, the 2004 Herman Bloch Medal for Industrial Research, the inaugural Scientific American 50 Top Technology leaders in 2002, and the 2000 Julius Springer Award for Applied Physics.

Tuesday, 10:45am-12:00pm

Session 4A: Code Generation and Synthesis

Chair: Xipeng Shen, NC State University

· Scaling up Superoptimization, Phitchaya Mangpo Phothilimthana (University of California, Berkeley), Aditya Thakur (Google), Rastislav Bodik (University of Washington), and Dinakar Dhurjati (Qualcomm Research)

· Lifting Assembly to Intermediate Representation: A Novel Approach Leveraging Compilers, Niranjan Hasabnis and R. Sekar (Stony Brook University)

· Architecture-Adaptive Code Variant Tuning, Saurav Muralidharan, Amit Roy, Mary Hall (University of Utah), Michael Garland (NVIDIA Corporation), and Piyush Rai (Duke University)

Tuesday, 10:45am-12:00pm

Session 4B: Energy and Thermal Management

Chair: Rajeev Balasubramonian, University of Utah and HP-Labs

· Maximizing Performance Under a Power Cap: A Comparison of Hardware, Software, and Hybrid Techniques, Huazhe Zhang and Henry Hoffmann (University of Chicago)

· The Computational Sprinting Game, Songchun Fan, Seyed Majid Zahedi, Benjamin C. Lee (Duke University)

· An Energy-interference-free Hardware-Software Debugger for Intermittent Energy-harvesting Systems, Alexei Colin, Brandon Lucia (Carnegie Mellon University), Alanson P. Sample, and Graham Harvey (Disney Research, Pittsburgh)

Tuesday, 1:00pm-2:40pm

Session 5A: Emerging Memory Technologies

Chair: Joseph Tucek, HP Labs

· NVWAL: Exploiting NVRAM in Write-Ahead-Logging, Wook-Hee Kim, Jinwoong Kim, Woongki Baek, Beomseok Nam (UNIST), and Youjip Won (Hanyang University)

· High-Performance Transactions for Persistent Memories, Aasheesh Kolli (University of Michigan), Steven Pelley (Snowflake Computing), Ali Saidi (ARM), Peter M. Chen, and Thomas F. Wenisch (University of Michigan)

· High-Density Image Storage Using Approximate Memory Cells, Qing Guo (NVIDIA), Karin Strauss (Microsoft Research and University of Washington), Luis Ceze (University of Washington and Microsoft Research), and Henrique S. Malvar (Microsoft Research)

· Failure-Atomic Persistent Memory Updates via JUSTDO Logging, Joseph Izraelevitz (University of Rochester), Aasheesh Kolli (University of Michigan), and Terence Kelly (HP Labs)

Tuesday, 1:00pm-2:40pm

Session 5B: Cloud Computing

Chair: Lingjia Tang, University of Michigan

· Interference Management for Distributed Parallel Applications in Consolidated Clusters, Jaeung Han, Seungheun Jeon (KAIST), Young-ri Choi (UNIST), and Jaehyuk Huh (KAIST)

· Taurus: A Holistic Language Runtime System for Coordinating Distributed Managed-Language Applications, Martin Maas, Krste Asanovic (UC Berkeley), Tim Harris (Oracle Labs, Cambridge), and John Kubiatowicz (UC Berkeley)

· HCloud: Resource-Efficient Provisioning in Shared Cloud Systems, Christina Delimitrou and Christos Kozyrakis (Stanford University)

· CloudSeer: Workflow Monitoring of Cloud Infrastructures via Interleaved Logs, Xiao Yu (North Carolina State University), Pallavi Joshi, Jianwu Xu (Autonomic Management, NEC Laboratories America), Guoliang Jin (North Carolina State University), Hui Zhang, and Guofei Jiang (Autonomic Management, NEC Laboratories America)

Tuesday, 3:00pm-4:15pm

Session 6A: Reliability and Debugging II

Chair: Sam H. Noh, UNIST (Ulsan National Institute of Science and Technology)

· LDX: Causality Inference by Lightweight Dual Execution, Yonghwi Kwon, Dohyeong Kim (Purdue University), William N. Sumner (Simon Fraser University), Kyungtae Kim, Brendan Saltaformaggio, Xiangyu Zhang, and Dongyan Xu (Purdue University)

· TaxDC: A Taxonomy of Non-Deterministic Concurrency Bugs in Datacenter Distributed Systems, Tanakorn Leesatapornwongsa (University of Chicago), Jeffrey F. Lukman (Surya University), Shan Lu, and Haryadi S. Gunawi (University of Chicago)

· RID: Finding Reference Count Bugs with Inconsistent Path Pair Checking, Junjie Mao, Yu Chen, Qixue Xiao, Yuanchun Shi (Tsinghua University)

Tuesday, 3:00pm-4:15pm

Session 6B: OS Optimizations

Chair: Emmett Witchel, University of Texas at Austin

· Scalable Kernel TCP Design and Implementation for Short-Lived Connections, Xiaofeng Lin (SINA Corporation,ZHIHU Corporation), Yu Chen (Tsinghua University), Xiaodong Li (SINA Corporation), Junjie Mao, Jiaquan He, Wei Xu, Yuanchun Shi (Tsinghua University)

· SpaceJMP: Programming with Multiple Virtual Address Spaces, Izzat El Hajj (University of Illinois at Champaign-Urbana), Alexander Merritt (Georgia Institute of Technology), Gerd Zellweger (ETH Zürich), Dejan Milojicic (HP Labs), Wen-Mei Hwu (University of Illinois at Champaign-Urbana), Karsten Schwan (Georgia Institute of Technology), Timothy Roscoe, Reto Achermann (ETH Zürich), and Paolo Faraboschi (HP Labs)

· memif: Towards Programming Heterogeneous Memory Asynchronously, Felix Xiaozhu Lin (Purdue ECE) and Xu Liu (College of William and Mary)

Tuesday, 4:30pm-9:00pm

Excursion: Aquarium

Bus Loading 4:30pm Four 56-passenger motor coaches, 1 or 2 busses will return immediately to the hotel for remaining attendees.

Aquarium Self-Quided Tour 5pm-9pm

Dinner at Aquarium 6pm-10pm
Drinks- 6pm-10pm (2 drink tickets provided; cash bar thereafter.)
Buffet Dinner- 6:30-8:30pm
Desserts & coffee- 7:30-9:30pm

Busses Shuttle Back 8:30pm-10pm

Wednesday, April 6, 2016

Wednesday, 8:15am-9:15am

Debate: Programmer Productivity in a World of Mushy Interfaces: Challenges of the Post-ISA Reality

Abstract:
Since 1964, we had the notion that the instruction set architecture (ISA) is a useful and fairly opaque abstraction layer between hardware and software. Software rode hardware's performance wave while remaining gloriously oblivious to hardware's growing complexity. Unfortunately, the jig is up. We still have ISAs, but the abstraction no longer offers seamless portability---parallel software needs to be tuned for different core counts, and heterogeneous processing elements (CPUs, GPUs, accelerators) further complicate programmability. We are better at building large-scale heterogeneous processors than we are at programming them. Maintaining software across multiple current platforms is difficult and porting to future platforms is also difficult. There have been many technical responses: virtual ISAs (e.g., NVIDIA's PTX), higher-level programming interfaces (e.g., CUDA or OpenCL), and late-stage compilation and platform-specific tailoring (e.g., Android ART), etc.

A team of opinionated experts, drawn from the three ASPLOS communities will examine the problem of programmer productivity in the post-ISA world, first from the perspective of their area of expertise and then noting the contributions from the other two communities. What research will save us and how? This wide-ranging debate will frame important research areas for future work while being grounded in frank discussion about what has succeeded in the past. Attendees can expect actionable insight into important research issues as well an entertaining discussion.

Chair: Emmett Witchel, University of Texas at Austin

Debaters: Margaret Martinosi (Princeton University)
Thomas Wenisch (University of Michigan)
Emery Berger (University of Massachusetts, Amherst)
Rastislav Bodik (University of California, Berkeley)
Gernot Heiser (University of New South Wales)
Xi Wang (University of Washington)

Wednesday, 10:20am-12:00pm

Session 7A: Non-traditional Computer Systems

Chair: Dean Tullsen, University of California, San Diego

· RAPID Programming of Pattern-Recognition Processors, Kevin Angstadt, Westley Weimer, and Kevin Skadron (University of Virginia)

· Proactive Control of Approximate Programs, Xin Sui, Andrew Lenharth, Donald S. Fussell, and Keshav Pingali (University of Texas at Austin)

· AXGAMES: Towards Crowdsourcing Quality Target Determination in Approximate Computing, Jongse Park, Emmanuel Amaro, Divya Mahajan, Bradley Thwaites, and Hadi Esmaeilzadeh (Georgia Institute of Technology)

· A DNA-Based Archival Storage System, James Bornholt, Randolph Lopez (University of Washington), Karin Strauss (Microsoft Research), Luis Ceze (University of Washington), Douglas M. Carmean (Microsoft Research), and Georg Seelig (University of Washington)

Wednesday, 10:20am-12:00pm

Session 7B: Heterogeneous Architectures and Accelerators II

Chair: Josep Torrellas, University of Illinois, Urbana-Champaign

· Generating Configurable Hardware from Parallel Patterns, Raghu Prabhakar, David Koeplinger, Kevin Brown, HyoukJoong Lee, Christopher De Sa, Christos Kozyrakis, and Kunle Olukotun (Stanford University).

· DySel: Lightweight Dynamic Selection for Kernel-based Data-parallel Programming Model, Li-Wen Chang, Hee-Seok Kim, and Wen-mei W. Hwu (University of Illinois)

· Baymax: QoS Awareness and Increased Utilization for Non-Preemptive Accelerators in Warehouse Scale Computers, Quan Chen, Hailong Yang, Jason Mars, and Lingjia Tang (University of Michigan, Ann Arbor)

· Analyzing Behavior Specialized Acceleration, Tony Nowatzki and Karthikeyan Sankaralingam (University of Wisconsin - Madison)

Wednesday, 1:10pm-2:25pm

Session 8A: Security II

Chair: Karin Strauss, Microsoft Research and University of Washington

· PIFT: Predictive Information-Flow Tracking, Man-Ki Yoon (University of Illinois at Urbana-Champaign), Negin Salajegheh, Yin Chen, and Mihai Christodorescu (Qualcomm Research)

· HIPStR -- Heterogeneous-ISA Program State Relocation, Ashish Venkat, Sriskanda Shamasunder, Dean Tullsen, and Hovav Shacham (University of California, San Diego)

· ANVIL: Software-Based Protection Against Next-Generation Rowhammer Attacks, Zelalem Birhanu Aweke, Salessawi Ferede Yitbarek (University of Michigan), Rui Qiao (Google Inc.), Reetuparna Das, Matthew Hicks (University of Michigan), Mark Seaborn (Google Inc.), Yossi Oren (Columbia University), and Todd Austin (University of Michigan)

Wednesday, 1:10pm-2:25pm

Session 8B: Transactional Memory

Chair: Gilles Muller, INRIA

· ProteusTM: Abstraction Meets Performance in Transactional Memory, Diego Didona, Nuno Diegues (INESC-ID / Instituto Superior Técnico, Universidade de Lisboa), Rachid Guerraoui (École Polytechnique Fédérale de Lausanne), Anne-Marie Kermarrec (INRIA), Ricardo Neves, and Paolo Romano (INESC-ID / Instituto Superior Técnico, Universidade de Lisboa)

· CSR: Core Surprise Removal in Commodity Operating Systems, Noam Shalev, Idit Keidar (Technion), Yaron Weinsberg (IBM Labs), Hagar Porat, and Eran Harpaz (Technion)

· CASPAR: Breaking Serialization in Lock-Free Multicore Synchronization, Tanmay Gangwani (University of Illinois Urbana Champaign), Adam Morrison (Technion), and Josep Torrellas (University of Illinois Urbana Champaign)