| The Bi-Mode Branch Predictor | Chih-Chieh Lee, I-Cheng K. Chen, Trevor N. Mudge |
| Path-Based Next Trace Prediction | Quinn Jacobson, Eric Rotenberg, James E. Smith |
| Alternative Fetch and Issue Policies for the Trace Cache Fetch Mechanism | Daniel Holmes Friendly, Sanjay Jeram Patel, Yale N. Patt |
| Reducing the Performance Impact of Instruction Cache Misses by Writing Instructions Into the Reservation Stations Out-of-Order | Jared Stark, Paul Racunas, Yale N. Patt |
| On High-Bandwidth Data Cache Design for Multi-Issue Processors | Jude A. Rivers, Gary S. Tyson, Edward S. Davidson, Todd M. Austin |
| Run-Time Spatial Locality Detection and Optimization | Teresa L. Johnson, Matthew C. Merten, Wen-Mei W. Hwu |
| A Comparison of Data Prefetching On an Access Decoupled and Superscalar Machine | G. P. Jones, N. P. Topham |
| The Design and Performance of a Conflict-Avoiding Cache | Nigel Topham, Antonio González, José González |
| Prediction Caches for Superscalar Processors | James E. Bennett, Michael J. Flynn |
| A Framework for Balancing Control Flow and Predication | David I. August, Wen-mei W. Hwu, Scott A. Mahlke |
| Evaluation of Scheduling Techniques On a SPARC-Based VLIW Testbed | Seongbae Park, SangMin Shim, Soo-Mook Moon |
| Tuning Compiler Optimizations for Simultaneous Multithreading | Jack L. Lo, Susan J. Eggers, Henry M. Levy, Sujay S. Parekh, Dean M. Tullsen |
| Exploiting Dead Value Information | Milo M. Martin, Amir Roth, Charles N. Fischer |
| Trace Processors | Eric Rotenberg, Quinn Jacobson, Yiannakis Sazeides, Jim Smith |
| The Multicluster Architecture: Reducing Cycle Time Through Partitioning | Keith I. Farkas, Paul Chow, Norman P. Jouppi, Zvonko Vranesic |
| Out-of-Order Vector Architectures | Roger Espasa, Mateo Valero, James E. Smith |
| Initial Results On the Performance and Cost of Vector Microprocessors | Corinna G. Lee, Derek J. DeVries |
| The Filter Cache: An Energy Efficient Memory Structure | Johnson Kin, Munish Gupta, William H. Mangione-Smith |
| Improving Code Density Using Compression Techniques | Charles Lefurgy, Peter Bird, I-Cheng Chen, Trevor Mudge |
| Procedure Based Program Compression | Darko Kirovski, Johnson Kin, William H. Mangione-Smith |
| Improving the Accuracy and Performance of Memory Communication Through Renaming | Gary S. Tyson, Todd M. Austin |
| Microarchitecture Support for Improving the Performance of Load Target Prediction | Chung-Ho Chen, Akida Wu |
| Streamlining Inter-Operation Memory Communication Via Data Dependence Prediction | Andreas Moshovos, Gurindar S. Sohi |
| The Predictability of Data Values | Yiannakis Sazeides, James E. Smith |
| Value Profiling | Brad Calder, Peter Feller, Alan Eustace |
| Can Program Profiling Support Value Prediction? | Freddy Gabbay, Avi Mendelson |
| Highly Accurate Data Value Prediction Using Hybrid Predictors | Kai Wang, Manoj Franklin |
| ProfileMe: Hardware Support for Instruction-Level Profiling On Out-of-Order Processors | Jeffrey Dean, James E. Hicks, Carl A. Waldspurger, William E. Weihl, George Chrysos |
| Procedure Placement Using Temporal Ordering Information | Nikolas Gloy, Trevor Blackwell, Michael D. Smith, Brad Calder |
| Predicting Data Cache Misses in Non-Numeric Applications Through Correlation Profiling | Todd C. Mowry, Chi-Keung Luk |
| Available Paralellism in Video Applications | Heng Liao, Andrew Wolfe |
| MediaBench: A Tool for Evaluating and Synthesizing Multimedia and Communicatons Systems | Chunho Lee, Miodrag Potkonjak, William H. Mangione-Smith |
| Cache Sensitive Modulo Scheduling | F. Jesús Sánchez, Antonio González |
| Unroll-and-Jam Using Uniformly Generated Sets | Steve Carr, Yiping Guan |
| Resource-Sensitive Profile-Directed Data Flow Analysis for Code Optimization | Rajiv Gupta, David A. Berson, Jesse Z. Fang |
