A Service-Oriented Memory Architecture for FPGA Computing, Joe Melber (CMU)

Monday, October 26, 2020
Location: Zoom
Time: 1:30PM-2:30PM

Memory access is an essential aspect of FPGA compute accelerator design. Current development environments pay much more attention to high-level compute abstraction while holding on to the familiar basic load-store memory paradigm. This paper proposes a service-oriented memory architecture where, instead of operating in terms of loads, stores and addresses, a compute accelerator design interacts with abstracted memory services that present high-level, semantic-rich operations—both compute and data transfers—on encapsulated data objects. The support for a memory service, realized as a soft-logic module or a composition of modules, is developed by domain experts and available to the accelerator design in a reusable catalog collection. This work sets forth a service-oriented memory architecture and provides a development framework to specify and generate a customized service-oriented memory system. We evaluate the proposed abstraction and design framework through a case study of a breadth-first search hardware accelerator. We demonstrate that a service-oriented memory paradigm increases development convenience while simplifiying an accelerator design without negatively impacting performance or resource utilization.

Joseph Melber is a final year PhD student in Electrical and Computer Engineering at Carnegie Mellon University where he is advised by Professor James Hoe. His research focuses on memory and programming abstractions for FPGA accelerators. Prior to joining CMU he received his B.S. in Electrical Engineering from the University at Buffalo.